Home
Help
Search
Login
Register
SlickEdit Community
»
Archived Beta Discussions
»
SlickEdit 201x Beta Discussions
»
SlickEdit 2015 v20 Beta Discussion
»
RC3 SystemVerilog virtual method beautification
« previous
next »
Print
Pages: [
1
]
Go Down
Author
Topic: RC3 SystemVerilog virtual method beautification (Read 7116 times)
warnerrs
Senior Community Member
Posts: 114
Hero Points: 4
RC3 SystemVerilog virtual method beautification
«
on:
October 29, 2015, 09:34:06 PM »
Is this configurable? It does look nice, but none of our existing code looks like this.
Code:
[Select]
virtual // beautify adds newline here.
task run_phase();
// blah blah
endtask
Logged
patrick
SlickEdit Team Member
Senior Community Member
Posts: 1818
Hero Points: 151
Re: RC3 SystemVerilog virtual method beautification
«
Reply #1 on:
October 30, 2015, 02:35:36 PM »
It's not supposed to be doing that, I'm looking at that next. Thanks for the report.
Logged
patrick
SlickEdit Team Member
Senior Community Member
Posts: 1818
Hero Points: 151
Re: RC3 SystemVerilog virtual method beautification
«
Reply #2 on:
November 04, 2015, 02:41:47 PM »
Forgot to update this earlier, this shouldn't happen anymore in rc5.
Logged
Print
Pages: [
1
]
Go Up
« previous
next »
SlickEdit Community
»
Archived Beta Discussions
»
SlickEdit 201x Beta Discussions
»
SlickEdit 2015 v20 Beta Discussion
»
RC3 SystemVerilog virtual method beautification