The following macro looks at the word under the cursor and searches from the beginning of the file to find a VHDL assignment. For example, if the cursor is on SignalName, executing the macro will find:
SignalName<=
SignalName <=
SignalName:=
SignalName :=
with any amount of white space between the signal name and the assignment operator. VHDL has two types of assignment operators, which is why they both are searched. The macro allows you to align your code for easier readability, yet quickly find all assignments (as compared to usage) of the signal.
You can easily change the assignment operator to match the specifics of the language.
Many thanks to Graeme who got me started.
Gardener
_command VhdlAssign() name_info(','VSARG2_MACRO|VSARG2_REQUIRES_MDI_EDITORCTL)
{
int k;
typeless p;
save_pos(p);
_str s = cur_word(k); // grab the word at the cursor
_str SignalAssign = " *<="; // assignment operator for signals in VHDL
_str VariableAssign = " *:="; // assignment operator for variables in VHDL
_str SearchOptions = "PUW"; // P = Wrap to beginning/end when string not found; U = Unix regular expression; W = full words
if (s != '')
{
top();
if (find(s :+ SignalAssign, SearchOptions) == 0) // check to see if a signal assignment can be found
{
return 0;
}
else if(find(s :+ VariableAssign, SearchOptions) == 0) // check to see if a variable assignment can be found
{
return 0;
}
}
restore_pos(p); // no match found, so go back to original cursor position
// echo warning message
message("Find(" :+ s :+ SignalAssign :+ ", " :+ SearchOptions :+ ") or Find(" :+ s :+ VariableAssign :+ ", " :+ SearchOptions :+ ") unsuccessful");
return -1;
}